Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
F
FPGA_Design
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Requirements
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Locked files
Build
Pipelines
Jobs
Pipeline schedules
Test cases
Artifacts
Deploy
Releases
Package Registry
Container Registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Service Desk
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Code review analytics
Issue analytics
Insights
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
David Schwietering
FPGA_Design
Commits
325d98c6
Commit
325d98c6
authored
4 years ago
by
David Schwietering
Browse files
Options
Downloads
Patches
Plain Diff
AutoCommitLogin 18.12.2020 14:53:44
parent
db7181a4
No related branches found
Branches containing commit
No related tags found
No related merge requests found
Changes
2
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
Praktikum_FD_3/Waveform.vwf
+249
-17
249 additions, 17 deletions
Praktikum_FD_3/Waveform.vwf
Praktikum_FD_3/v3.bdf
+575
-318
575 additions, 318 deletions
Praktikum_FD_3/v3.bdf
with
824 additions
and
335 deletions
Praktikum_FD_3/Waveform.vwf
+
249
−
17
View file @
325d98c6
...
@@ -20,6 +20,8 @@ proc simTimestamp {} {
...
@@ -20,6 +20,8 @@ proc simTimestamp {} {
after 2500 simTimestamp
after 2500 simTimestamp
run -all
run -all
quit -f
quit -f
</modelsim_script>
</modelsim_script>
<modelsim_script_timing>onerror {exit -code 1}
<modelsim_script_timing>onerror {exit -code 1}
vlib work
vlib work
...
@@ -38,6 +40,8 @@ proc simTimestamp {} {
...
@@ -38,6 +40,8 @@ proc simTimestamp {} {
after 2500 simTimestamp
after 2500 simTimestamp
run -all
run -all
quit -f
quit -f
</modelsim_script_timing>
</modelsim_script_timing>
<hdl_lang>vhdl</hdl_lang>
<hdl_lang>vhdl</hdl_lang>
</simulation_settings>*/
</simulation_settings>*/
...
@@ -75,7 +79,7 @@ HEADER
...
@@ -75,7 +79,7 @@ HEADER
GRID_DUTY_CYCLE = 50;
GRID_DUTY_CYCLE = 50;
}
}
SIGNAL("A
_out
")
SIGNAL("A")
{
{
VALUE_TYPE = NINE_LEVEL_BIT;
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
SIGNAL_TYPE = SINGLE_BIT;
...
@@ -85,7 +89,7 @@ SIGNAL("A_out")
...
@@ -85,7 +89,7 @@ SIGNAL("A_out")
PARENT = "";
PARENT = "";
}
}
SIGNAL("B
_out
")
SIGNAL("B")
{
{
VALUE_TYPE = NINE_LEVEL_BIT;
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
SIGNAL_TYPE = SINGLE_BIT;
...
@@ -95,7 +99,7 @@ SIGNAL("B_out")
...
@@ -95,7 +99,7 @@ SIGNAL("B_out")
PARENT = "";
PARENT = "";
}
}
SIGNAL("C
_out
")
SIGNAL("C")
{
{
VALUE_TYPE = NINE_LEVEL_BIT;
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
SIGNAL_TYPE = SINGLE_BIT;
...
@@ -115,7 +119,7 @@ SIGNAL("clk")
...
@@ -115,7 +119,7 @@ SIGNAL("clk")
PARENT = "";
PARENT = "";
}
}
SIGNAL("D
_out
")
SIGNAL("D")
{
{
VALUE_TYPE = NINE_LEVEL_BIT;
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
SIGNAL_TYPE = SINGLE_BIT;
...
@@ -135,30 +139,110 @@ SIGNAL("nrst")
...
@@ -135,30 +139,110 @@ SIGNAL("nrst")
PARENT = "";
PARENT = "";
}
}
TRANSITION_LIST("A_out")
SIGNAL("hex")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = BUS;
WIDTH = 7;
LSB_INDEX = 0;
DIRECTION = OUTPUT;
PARENT = "";
}
SIGNAL("hex[6]")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "hex";
}
SIGNAL("hex[5]")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "hex";
}
SIGNAL("hex[4]")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "hex";
}
SIGNAL("hex[3]")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "hex";
}
SIGNAL("hex[2]")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "hex";
}
SIGNAL("hex[1]")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "hex";
}
SIGNAL("hex[0]")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "hex";
}
TRANSITION_LIST("A")
{
{
NODE
NODE
{
{
REPEAT = 1;
REPEAT = 1;
LEVEL
0
FOR 1000.0;
LEVEL
X
FOR 1000.0;
}
}
}
}
TRANSITION_LIST("B
_out
")
TRANSITION_LIST("B")
{
{
NODE
NODE
{
{
REPEAT = 1;
REPEAT = 1;
LEVEL
0
FOR 1000.0;
LEVEL
X
FOR 1000.0;
}
}
}
}
TRANSITION_LIST("C
_out
")
TRANSITION_LIST("C")
{
{
NODE
NODE
{
{
REPEAT = 1;
REPEAT = 1;
LEVEL
0
FOR 1000.0;
LEVEL
X
FOR 1000.0;
}
}
}
}
...
@@ -167,16 +251,21 @@ TRANSITION_LIST("clk")
...
@@ -167,16 +251,21 @@ TRANSITION_LIST("clk")
NODE
NODE
{
{
REPEAT = 1;
REPEAT = 1;
LEVEL 0 FOR 1000.0;
NODE
{
REPEAT = 50;
LEVEL 0 FOR 10.0;
LEVEL 1 FOR 10.0;
}
}
}
}
}
TRANSITION_LIST("D
_out
")
TRANSITION_LIST("D")
{
{
NODE
NODE
{
{
REPEAT = 1;
REPEAT = 1;
LEVEL
0
FOR 1000.0;
LEVEL
X
FOR 1000.0;
}
}
}
}
...
@@ -189,9 +278,72 @@ TRANSITION_LIST("nrst")
...
@@ -189,9 +278,72 @@ TRANSITION_LIST("nrst")
}
}
}
}
TRANSITION_LIST("hex[6]")
{
NODE
{
REPEAT = 1;
LEVEL X FOR 1000.0;
}
}
TRANSITION_LIST("hex[5]")
{
NODE
{
REPEAT = 1;
LEVEL X FOR 1000.0;
}
}
TRANSITION_LIST("hex[4]")
{
NODE
{
REPEAT = 1;
LEVEL X FOR 1000.0;
}
}
TRANSITION_LIST("hex[3]")
{
NODE
{
REPEAT = 1;
LEVEL X FOR 1000.0;
}
}
TRANSITION_LIST("hex[2]")
{
NODE
{
REPEAT = 1;
LEVEL X FOR 1000.0;
}
}
TRANSITION_LIST("hex[1]")
{
NODE
{
REPEAT = 1;
LEVEL X FOR 1000.0;
}
}
TRANSITION_LIST("hex[0]")
{
NODE
{
REPEAT = 1;
LEVEL X FOR 1000.0;
}
}
DISPLAY_LINE
DISPLAY_LINE
{
{
CHANNEL = "A
_out
";
CHANNEL = "A";
EXPAND_STATUS = COLLAPSED;
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
RADIX = Binary;
TREE_INDEX = 0;
TREE_INDEX = 0;
...
@@ -200,7 +352,7 @@ DISPLAY_LINE
...
@@ -200,7 +352,7 @@ DISPLAY_LINE
DISPLAY_LINE
DISPLAY_LINE
{
{
CHANNEL = "B
_out
";
CHANNEL = "B";
EXPAND_STATUS = COLLAPSED;
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
RADIX = Binary;
TREE_INDEX = 1;
TREE_INDEX = 1;
...
@@ -209,7 +361,7 @@ DISPLAY_LINE
...
@@ -209,7 +361,7 @@ DISPLAY_LINE
DISPLAY_LINE
DISPLAY_LINE
{
{
CHANNEL = "C
_out
";
CHANNEL = "C";
EXPAND_STATUS = COLLAPSED;
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
RADIX = Binary;
TREE_INDEX = 2;
TREE_INDEX = 2;
...
@@ -227,7 +379,7 @@ DISPLAY_LINE
...
@@ -227,7 +379,7 @@ DISPLAY_LINE
DISPLAY_LINE
DISPLAY_LINE
{
{
CHANNEL = "D
_out
";
CHANNEL = "D";
EXPAND_STATUS = COLLAPSED;
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
RADIX = Binary;
TREE_INDEX = 4;
TREE_INDEX = 4;
...
@@ -243,6 +395,86 @@ DISPLAY_LINE
...
@@ -243,6 +395,86 @@ DISPLAY_LINE
TREE_LEVEL = 0;
TREE_LEVEL = 0;
}
}
DISPLAY_LINE
{
CHANNEL = "hex";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 6;
TREE_LEVEL = 0;
CHILDREN = 7, 8, 9, 10, 11, 12, 13;
}
DISPLAY_LINE
{
CHANNEL = "hex[6]";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 7;
TREE_LEVEL = 1;
PARENT = 6;
}
DISPLAY_LINE
{
CHANNEL = "hex[5]";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 8;
TREE_LEVEL = 1;
PARENT = 6;
}
DISPLAY_LINE
{
CHANNEL = "hex[4]";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 9;
TREE_LEVEL = 1;
PARENT = 6;
}
DISPLAY_LINE
{
CHANNEL = "hex[3]";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 10;
TREE_LEVEL = 1;
PARENT = 6;
}
DISPLAY_LINE
{
CHANNEL = "hex[2]";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 11;
TREE_LEVEL = 1;
PARENT = 6;
}
DISPLAY_LINE
{
CHANNEL = "hex[1]";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 12;
TREE_LEVEL = 1;
PARENT = 6;
}
DISPLAY_LINE
{
CHANNEL = "hex[0]";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 13;
TREE_LEVEL = 1;
PARENT = 6;
}
TIME_BAR
TIME_BAR
{
{
TIME = 0;
TIME = 0;
...
...
This diff is collapsed.
Click to expand it.
Praktikum_FD_3/v3.bdf
+
575
−
318
View file @
325d98c6
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment